Altera’s Arria 10 SoCs have been designed to meet the performance and power requirements for mid-range applications such as:

• Wireless infrastructure equipment including remote radio unit and mobile backhaul*

• Compute and storage equipment including flash cache, cloud computing, and acceleration*

• Broadcast studio and distribution equipment including professional A/V and video conferencing*

• Military guidance, control, and intelligence equipment*

• Wireline 100G line cards, bridges and aggregation, 40G GPON*

• Test and measurement equipment*

• Diagnostic medical imaging equipment*

• PCI Express® (PCIe®) Gen3 x8 lanes (endpoint or root port)*

*Application-specific daughter cards, available separately, supporting a wide range of I/O and interface standards

Hardware

• Arria 10 10AS066N3F40E2SG1 SoC

• Embedded USB-BlasterTM II for hard processor system (HPS) or FPGA programming

• PCI Express® (PCIe®) Gen3 x8, Dual FPGA mezzanine card (FMC) expansion headers

• Two 10/100/1000 SGMII Ethernet ports and one 10/100/1000 RGMII Ethernet port and two 10GbE small form factor pluggable (SFP) cages

• 1 FMC loopback card

• USB On-The-Go (USB OTG) port

• 1GB DDR4 HPS HILO memory card

• NAND, QSPI, and SD/MICRO boot flash cards

• 1GB DDR4 HILO memory card

• Display port and SDI port

Software

• Golden System Reference Design

• Board Update Portal design

• Board Test System (BTS) design

• Arria 10 SoC Development Kit User Guide

• Arria 10 SoC Development Kit Quick Start Guide

• Arria 10 SoC Development Board Reference Manual

• Development Kit design files(BOM, Schematics, Layout)

• Design software3

• Intel® SoC FPGA Embedded Design Suite (EDS), including ARM® Development Studio 5TM (DS-5TM) Altera Edition Toolkit

• Quartus Prime software (required)

• Nios® II processor (optional)

• MegaCore® intellectual property (IP) library (optional)

• Mentor Graphics® ModelSim®-Intel® FPGA software (optional)

Arria 10 SoC Development Kit Block Diagram